Commonly used chip carriers such as controlled collapsible chip carrier connections (C5) and the like are today used in many IC package designs. Specifically, the term C5 is only one variety of carrier and refers to the contacting scheme which uses solder spheres or balls on a component that has been reflowed onto the contact side of a surface mount package. This type of configuration is used to interface the IC, located within the chip carrier, with the outside environment.
Previously, many techniques have been used to test C5 packages as well as others. These techniques all require some interface between the chip carrier with a specific test apparatus. Often, in order to accommodate particular test equipment, it may be necessary to actually modify the chip carrier in order to provide and acceptable interface. Obviously, this can turn into a cumbersome task requiring a number of electrical modifications consuming much time and effort. Moreover, in view of the large number of chips which may need to be tested, this task becomes impractical leading often to IC packages which become untested to due the time factors involved. Since many chips are tested prior to shipment or during repair the delay in setting up an interface between IC and test equipment directly translates into a great increase in time. This ultimately increases chip cost and consumer expense of the product.
Therefore, it is evident the need exists for a device which can be used to easily test a variety of chip carriers including C5 chip packages. The device should be inexpensive to manufacture, easy to use and have a high reliability to accurately test IC packages to check for proper and correct operational parameters.